I use LCDC drive IPS screen, using MCU 8bit interface and RGB565. Dot number is 320 * 480. Following Ambd_SDK example(ambd_sdk\project\realtek_amebaD_va0_example\example_sources\LCDC\MCU_trigger_DMA), after LCDC_MCUDMATrigger(LCDC) there are a block image wrong, the end little block, image data is the last cache(in the buffer). Can you point the possible reasons?
I modify example MCU_trigger_DMA to VSYNC mode, according “AN0400 Ameba-D Application Note v1.pdf” part 19.5.1.3 VSYNC mode. After updating the frame buffer first, the issue is the same as Trigger DMA mode. After updating the frame buffer second, the frame is the same as updating first, no changing, following updating first, no delay, the display is right. Can you point the possible reasons?
Thanks a lot.
1 Like
Hi @lhxzui Thanks for reaching out to us,
Can you provide information such as version of your SDK and the Operating System using?
SDK is the newest, from github.
The Operating System is win10, with IAR for ARM.
Found the reason.
D-Cache. The image buffer in PSRAM, data must be written into PSRAM from D-Cache before starting DMA transmission, from PSRAM to LCDC.
Thanks.
1 Like
Thanks for letting us know, great it works now 