BW16 Development board SPI_Slave,Master help

Hello, I am doing SPI communication with a BW16 development board, and I want to use two Bw16 development boards, one as a Master and the other as a Slave. I’m developing with the Arduino IDE, and I’m having trouble with the Slave part, so I’m asking for help.

  1. When BW16 uses SPI, can it be used only for master purpose?

  2. Data can be transmitted using SPI.transfer(), but how does the slave receive data?

  3. If there is an example of Master-Slave SPI communication Arduino IDE, please share.

Hi, @eckim

If you are using BW16 – RTL8720DN, then please note that there is only 1 set of SPI which is SPI1, and it only support Master mode, not slave mode

SPI is a bi-directional communication protocol, but only master initiate the transfer, slave only receive and transfer back information upon master’s request

There are plenty on the internet, for example

Thank you for good information.

You said that BW16 supports SPI1 and does not support slave mode.

However, as shown in the figure below, ‘RTL8720DN’ is
It supports ‘HS_USI_SPI’ function and supports Master/Slave mode.
‘BW16’ based on ‘RTL8720DN’ can’t use that function?


BW16 dosen’t have HS_USI_SPI peripheral, it only has HS_SPI1 which only support master mode as shown in your picture

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Thank you very much.

If you can get the IC, maybe you can make use of the USI_SPI, but on the BW16 module itself, it doesn’t have

If I get an IC, if I want to use USI_SPI, how should I connect it to the IC to operate as a slave?

you need to check which are the pins for HS_USI_SPI, then configure these pins accordingly in the software, the rest is the same as using normal hardware SPI

USI SPI can work as slave on BW16, but the CS pin is not exposed on an external pin. It is instead connected to ground internally via a pull down.

You can use a different pin for CS with an interrupt, and in the interrupt flush any received data and start a new Receive.

However, this would not allow more than one slave device on the bus. Its also not very fast, needing the master to have some delays after changing the CS state, to allow the slave to be ready.

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Hi @Smythbuilt

Thanks for sharing your findings~